资源列表
mul4
- 分析二进制乘法中计算步骤（多少次加法，何时进行），实现一个有限状态机，执行乘法运算。-Analysis of binary multiplication in the calculation of step (adding the number of times, when it will be), the realization of a finite state machine, the implementation of multiplication.
LCD-n-Keypad
- 8051 based lcd and keypad interfacing with source code!
bootloaderforYL2440
- bios YL2440源码，有使用的朋友可以下载
EDA4
- 数字钟设计：实现动态数码管显示时分秒； 可以预置为12小时计时显示和24小时计时显示；一个调节键，用于调节目标数位数字。对调节的内容敏感，如调节分钟或秒时，保持按下时自动计数，否则以脉冲计数。 -Digital clock design: dynamic digital display, hour can be preset to 12-hour time display and 24-hour time display a regulatory key target for reg
biaojue
- VHDL编写的七人表决器，有做课程设计的有福了-Written in VHDL seven voting machine, there are so blessed Oh curriculum design
zlib
- zlib项目，arm codeblocks的项目-codeblocks project for zlib
DM642_syn
- 一个用vHDL语言编的同步程序，对图像处理人员有帮助哦-VHDL language used for a synchronization process, the image processing staff helpful Oh
library
- 驱动ILI9330的程序，基于STM32的处理器，方便驱动也液晶显示器-Drive ILI9330 program, based on the STM32 processor, is also easy to drive liquid crystal display
microprocessor
- 一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump
Variable-mode--counter
- 这是可变模加减计数器的Verilog源程序，已经编译通过，可以使用-This is the variable mode subtraction counter Verilog source code, has been compiled by, you can use
lingyan61+PCB
- 这是凌阳61板的原理图和PCB版图，希望能给大家的学习提供帮助！
WG2005_Keygen
- common license of pads2005