资源列表
PWM_extend
- 本代码采用RTL级的硬件描述语言设计了一个多通道的PWM波形捕获、输出模块。主要用在无人机或是其它需要控制多个伺候电机的场合。开发环境为Xilinx公司的ISE12.0。-This code uses RTL-level hardware descr iption language designed a multi-channel PWM waveform capture, output module. Mainly used in the need to control multiple un
lingsijiao-zhongji(2)
- 《零死角玩转STM32》系列教程由初级篇、中级篇、高级篇、系统篇、四个部分组成，根据野火STM32开发板旧版教程升级而来，且经过重新深入编写，重新排版，更适合初学者，步步为营，从入门到精通，从裸奔到系统，让您零死角玩转STM32。M3的世界，与野火同行，乐意惬边。 -" Zero dead Fun STM32" tutorial series from primary papers, intermediate piece, advanced articles, system p
SeriesSample
- wince下evc编程，与下位s7-200通信代码。-Under wince evc programming, and the next s7-200 communications code.
heart
- 基于STM32的心电处理算法，能获取并给出用户的心率，记录和读取异常心率。-STM32-based ECG processing algorithms, and gives the user can get the heart rate, abnormal heart rate recording and reading.
led_test
- LED流水灯，4个流水灯，每隔一秒亮一次，4秒为一周期(LED water light, 4 water lights, every second, once, 4 seconds for a cycle)
电机
- 利用stm32芯片，通过can控制电机的运动(Control the motion of the motor through can)
ValuRang
- This book describes a static analysis that aims to prove the absence of buffer overflows in C programs. The analysis is conservative in the sense that it locates every possible overflow. Furthermore, it is fully automatic in that it requires no user
E_8051_FTEST_K4X4_new
- 是带５１单片机核的等精度频率计的ＦＰＧＡ设计的部分。用ＶＨＤＬ编的，也有ＶＥＲＩＬＯＧ的。-51 is a single chip with precision, such as the nucleus of the frequency of some of FPGA design. VHDL for use as well as the VERILOG.
Real-Time_Embedded_Multithreading_Using_ThreadX_Se
- 世界上唯一一本关于嵌入式操作系统thradX内核的书，中文有翻译的第一版，这是从老外网上辛苦找来的2009年的新版第二版，大家共同学习。《Real-Time_Embedded_Multithreading_Using_ThreadX(Second Edition)》-The world' s only about an embedded operating system kernel thradX book, there is English translation of the firs
LCM8080Parallel8BitBus
- 通用的液晶显示屏驱动。液晶显示屏：KD014QQTBN001（ST7735S）。开发板：Arduino。小面包板：SYB-170。线：杜邦线。源码：C。-General Driver of LCM (Liquid Crystal Module). LCM: KD014QQTBN001 (ST7735S). DevelopementBoard: Arduino. SmallBreadBoard: SYB-170. Line: Dupont Line。SourceCode: C.
jallib-all_devices-0.8.0
- jal programming jaluino aldevices
verilog状态机
- 采用Verilog语言设计一个序列信号发生器和一个序列信号检测器，二者都以状态机模式实现。序列信号发生器输出8位宽度的序列信号“10110110”，通过数码管显示出来；序列信号发生器的输出接入序列信号检测器，检测器检测当前的输入信号，若出现目标序列信号则通过蜂鸣器输出一个声响，表示检测到有效的目标信号。(A sequence signal generator and a sequence signal detector are designed using Verilog language, b