资源列表
max197
- verilog编写的状态机控制A/D芯片MAX197正常工作-use verilog write the state machine which is used to meke the A/D chip working!
POC
- 东南大学学生数字系统设计实验：用VHDL语言编写Printer与CPU互连的接口程序-Southeast University students in the experimental digital system design: VHDL language with Printer and CPU interface interconnection procedures
GPIO_LCM
- 该文件是GPIO模拟时序，实现SPI协议的代码。-This file is GPIO analog timing to achieve SPI protocol code.
mimo.matlab
- 仿真mimo的matlab代码，网上找的，个人感觉很有用。请大家支持-failed to translate
bit_logic_ulogic
- truong trinh thuc hien viec chuyen doi cac kieu du lieu
TCDTiming
- tcd1501d 时序，用于tcd1501d的驱动，不知可否好使，希望供大家参考-the code is for tcd1501d ccd timing，wish it is useful for you
s_p2m_onechnl
- 这是一个串转并的代码示例，将串行的数据转换为并行数据-This code example, a string transfer and the serial data is converted to parallel data
traffic
- verilog,使用两个传感器的铁路道口异步交通灯设计。-an asynchronous circuit that is to control the gates and red flashing light at a railway level crossing
npp1tmPD
- 一种封装库，比较全面，这个是别人的封装库-A packaged library, more comprehensive, this is someone else' s package library
1
- 使用 c语言，实现 点亮一个LED 灯.-Use c language to achieve a lit LED lights
jiaotongdeng
- 以74LS273作为输出口，控制4个双色LED灯（可发红，绿，黄光），模拟交通灯管理。-In 74LS273 as an output port, controlled four-color LED lights (which can be red, green, yellow), simulated traffic light management.
esjz
- 60-24 模拟时钟分钟小时计数器。 分钟为60标号的计数器从0-1-2-……58-59 循环往复，完成1个分循环，小时循环计数器加1；小时采用24小时制。-60-24 simulator of a clock, 60 is for minutes, starts 0 increased by 1,and cycle period is 60 once a cycle is finished, the 24 adding-type counter will increase by1 and