资源列表
mdio
- MDIO verilog RTL代码，SOC可以通过MDIO接口来访问外部PHY等慢速外设-MDIO verilog RTL code
user_logic_0
- 基于microblaze EDK 工程，实现六种RFID 协议的ip core。-Based on microblaze EDK project, to achieve the six RFID protocol ip core.
i8255_verilog
- 8255的Verilog hdl源代码，适合FPGA工程师使用-8255' s Verilog hdl source code for FPGA engineers
VGA
- herez the code of VGA.its hardware implementation on FPGA
EDA_FPGA_240i2c-master-slave
- 用硬件语言实现的I2C程序，主从都包括，从而实现主从之间的通信-Using the I2C hardware language program, including master and slave are, in order to achieve the communication between master and slave
Code
- 用于数字积分器的设计，主要涉及VHDL、Verilog等FPGA编程语言。-Design of Digital Integrator
STCFFTnew
- 用C51通过傅李叶运算在液晶屏上显示音乐频谱，采样是4.47K-Fu Lee leaves with C51 through operations on the LCD display musical spectrum, the sampling is 4.47K
FPGA_Turbo
- Turbo码编解码的FPGA实现，verilog语言编写-Implementation ofTurbo code on FPGA , using Verilog language
LL
- verilog语言的计数器设计程序代码。-counter verilog language design code.
water-lamp
- 这是关于流水灯的vhdl程序，功能是8个led灯间隔1s交替变亮-This is a light water vhdl program, 8 led light interval 1s alternately brighten
SDRAM
- 用XilinxSC1500控制SDRAM的一段VHDL代码。控制SDRAM每个时钟内输出地址所在的一个数据。-For some VHDL code with XilinxSC1500 Control SDRAM. Control SDRAM Each clock output address where a data.
MotorVHDL
- 一个关于松下伺服电机驱动及反馈的VHDL程序-VHDL program a Panasonic servo motor drive and feedback