资源列表
FPGA-BASYS2
- 基于FPGA BASYS2开发板的数字钟，能够实现计时，时间校准，闹钟，整点报时等功能。-Development board based on FPGA BASYS2 digital clock, to achieve timing, time calibration, alarm, hourly chime functions.
i2c-master
- I2C Master Code in Verilog using Finite State Machine.
FPGA_BDPSK
- FPGA实验_BDPSK调制解调器设计(包含10个模块)-Experimental _BDPSK modem FPGA design (including 10 modules)
Random_Derandom
- 通信中加扰/解扰算法。FPGA源代码，verilogHDL语言实现，包含测试程序。-Perturbation/perturbation algorithm. FPGA source code, verilogHDL language implementation, including test procedures.
RFID_VERILOG_1988
- RFID Reader using verilog
multiplier_n_bits
- VHDL multiplier - input : two n (n customizable) bits width vectors
square_root_n_bits
- VHDL square root - compute square root n (n customizable) bits width vector (restoring square root algorithm)
bpsk
- 基于matlab的bpsk解调仿真，包括误码率的结果比较。- U57Fn
jesd204
- xilinx平台 jesd204核例化使用示例(Xilinx platform jesd204 core example of the use demo)
i2c_master_slave_latest.tar
- i2c master slave VHDL code
yenyan_v76
- Independent component analysis algorithm reduces the raw data noise, Including quaternion various calculations, Including Deng's correlation, absolute correlation, correlation of slope, improved absolute correlation.
mips
- mips verilog进行编写cpu,其中包括了若干的基本指令(use the verilog language to programme the CPU)