资源列表
FSM two sequence
- FSM sequence detector
数字电压表程序
- 基于FPGA的数字电压表 两种方案 一种VHDL一种Verilog(Digital voltmeter based on FPGA)
DE2_synthesizer
- 基于DE2FPGA开发板的多功能音乐合成器研究实现与综合(based on DE2 FPGA 2C35 development board design music synthesizer string base)
Quartus按键去抖动程序
- Verilog语言编写的按键去抖动模块demo(Key debounce module demo written in Verilog language)
JY901
- ustartled控制代码,供测试使用，p10单元可用(usart Ustartled control code for test use, P10 unit available)
BT1120编解码时序量产代码
- BT1120 模块化代码，共享给大家，需要FPGA 实现BT1120 编码或者解码功能绝对有用，包含编码、解码、仿真文件(BT1120 encode & BT1120 decode & sim)
wallace_multiplier
- 华莱士树乘法器，运用了华莱士树状结构和布斯算法，提高了速度(The Wallace tree multiplier uses the Wallace tree structure and the Buss algorithm to increase speed)
to cameralink
- xilinx spartan6系列FPGA，cameralink实现模块(xilinx spartan6 serial FPGA,cameralink module)
sci_host
- fpga实现高速多路同步串口，接收发送模块(Implementation of high-speed multi-channel synchronous serial port by FPGA)
RISC
- URISC的RTL级设计，Verilog代码(Design: URISC RTL Verilog)
module_average_filter
- 一个中值滤波算法的verilog实现。。。。。。。(Verilog implementation of a median filtering algorithm)
vivado2018+IPs
- Xilinx Vivado 2018 License File