资源列表
8254-373
- 应用373进行地址锁存的操作8254的源代码，详细情况可向作者联系 连线： A0---Q0 A1---Q1 A2---CS -373 applications for the operation address latch 8254 source code, the details of which can be linked to the authors link : A0 A1 Q0 --- --- --- CS Q1 A2
fx2sdly
- 共同的FX2常数，宏，数据类型以及函数库内副函数的雏形框架
div_aegp
- 用VHDL语言实现的除法器，可以处理非整除运算。精度0.004
dmx512
- DMX512接收程序C源代码，DMX512接收程序-C source code of the receiving program DMX512, DMX512 receiving program
SYNC_FIFO
- its simple fifo.which is used to first in first out for vhdl source code
max2_test
- MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.
pngpang(2)
- 用vhdl语言使用ise开发工具模拟两人乒乓球游戏，实现状态转换。-Ise vhdl language with development tools using two table tennis simulation game, to achieve the state transition.
63bit1amount
- 求63位二进制数前导1个数Verilog-Solution for 63bit-FL1. Writen with Verilog.
2-to-4-Decoder-with--Configuration
- 2-to-4 Decoder with Testbench and Configuration This set of design units illustrates several features of the VHDL language including: Using generics to pass time delay values to design entities. Design hierarchy using instantiated components.
AD5668_verilog
- AD5668 的spi控制,使用verilog编写-control AD56668 using verilog
test
- 大神写的keyboard text，供各位参考下，C语言写的，更容易理解。-keyboard text，those code can be used to check if the key was pressed or not.
FLOATING-BUFFER
- Floating Buffer verilog code for NOC design used for dynamic reconfiguration.