资源列表
keydisplay
- 全部通过，是我的精心设计，完全满足初学者的要求。-all passed, I was carefully designed, fully meet the requirements of beginners.
uart_transmitter
- Very good info. for RS-232 transmitter VHDL code .
frequency_divide
- 本程序用verilog编写，实现了任意整数分频-Arbitrary integer frequency_divider
p18f248deCAN
- 本程序为CAN，实现缓冲器之间的发送与接收自测试模式，其中接收采用中断方式-This procedure for the CAN, the realization of buffers to send and receive between the self-test mode, which used to receive interrupt
rectangularwave
- 程序功能在基于TI公司TMS320F2812开发板上实现周期为1s的矩形波-Program features based on TI' s TMS320F2812 board to achieve the development cycle rectangular wave 1s
zonggongcheng
- 三个结合起来的D触发器的vhdl，分别是电平触发，上升沿出发和下降沿出发。-Combining the three D flip-flop vhdl, respectively, trigger level, rising and falling edge start start.
last-step
- Please read your package and describe it at least 40 bytes in English. System will automatically delete the directory of debug and release, so please do not put files on these two directory.
camera_fifo_ctrl
- camera异步接口中FIFO控制部分的源代码-FIFO control section of the source code in the asynchronous interface, camera
writereadflash
- 这个是用VHDL实现FPGA对FLASH的读写。-This is achieved using VHDL FLASH FPGA to read and write.
clark_dsp28335
- 通过DSP28335实现clark变换.-Clark was achieved by DSP28335 transformation.
www
- 卷积码编码器卷积码是1955年由Elias等人提出的，是一种非常有前途的编码方法 一些资料上可以找到关于分组码的一些介绍-Convolutional code encoder
ADC0804
- 基于adc0804lcn的verilog 程序转换，程序提供了一个范例，仅供大家学习参考-Adc0804lcn based on the Verilog program conversion, the program provides a sample, for everyone to learn the reference