资源列表
basic_framework_operating_system_8051
- The framework of an application using a timer ISR to call functions on a periodic basis using the 8051.
DDram
- 07全国大学生电子设计竞赛C题获奖作品FPGA外围接口双口RAM部分源码
MEDIAN.v
- fpga 的 median的verilog实现-median of verilog implementation
32_16div
- 这是一个简单的除法器（32bit/16bit),采用移位相减法-This is a simple divider (32bit/16bit), using phase shift subtraction
chengxu
- 加法器 比较器verilog hdl 等简单小程序 新手学习中 见谅-Adder comparator verilog hdl Adder comparator verilog hdl a small way as simple novice learning apologize
SEND422
- 这是用VHDL编写的代码，是RS422在UART协议层上实现数据发送的过程，很有用的啊！-It is written in VHDL code, is RS422 UART protocol layer in the data transmission process, useful, ah!
switched_LED.c
- program to read a switch connected between digital pin 2 and ground, and use this to control an LED
Encoder1
- encode of aes arith" it describer how to encode streams and something.. if you want to acknowlegde about-encode of aes arith" it describer how to encode streams and something.. if you want to acknowlegde about
cmi
- 用systemview搭建的cmi编码系统-Cmi built with systemview coding system
main
- 74HC164 drive multi segment display
misc_Int32ToHexStr
- 把无符号整形数转换为16进制字符串，长度为len。 -The unsigned integer converted to hexadecimal string of length len
AD
- 控制AD7934的信号verilog,控制AD7934的信号verilog-control the ad7934