资源列表
SerivalPC1
- 用VHDL编写的单片机与串口的通信，通过调试，波特率为9600，在串口调试助手能看到相应的结果-Prepared with the VHDL serial communication between MCU and, through the commissioning, the baud rate is 9600, the serial debugging assistant can see the results of the corresponding
VGA-LCD
- 采用VHDL编写的VGA LCD显示。经过了调试仿真，在FPGA芯片上下载成功，并得到了预期效果-Written by VHDL VGA LCD display. After a debugging emulator, FPGA chip in the download is successful, and get the desired effect
RS232_FIR
- Quartus II was a development tool of CPLD / FPGA by Altera Company. Quartus II provides a fully integrated circuit structure and has nothing with the development package environment, it has all the features of digital logic design, it is including: a
ir2103O
- very nyce component pispice
MIT.Press-.Circuit.Design.with.VHDL.(2004).TLF.ra
- This book is a good reference for VHDL Programming. this book is divided into two parts Circuit Design and System Design
Upfc-EPE01
- INVESTIGATION OF THE 3-LEVEL UNIFIED POWER FLOW articel Keywords FACTS, UPFC, 3-level voltage source inverter, device modeling, power transmission, digital simulation.
1
- it is the file containing verilog code
ds1307
- ds1307 ds1307-ds1307 ds1307 ds1307
uart-(VHDL)
- 利用VHDL语言实现的UART串口通讯，以经过下载验证-the UART program with VHDL as develop language
pinyujideshixian
- 基于单片机的频率计的实现和protuse仿真-Frequency meter based on single chip implementation and protuse simulation
1602yujianpan
- 基于C语言的1602与键盘的设计用单片机实现-1602 based on C language and design of the keyboard with MCU
cong
- 利用动态扫描和定时器1在数码管上显示出从765432开始以1/10秒的速度往下递减直至765398并保持显示此数，与此同时利用定时器0以500MS速度进行流水灯从上至下移动，当数码管上数减到停止时，实验板上流水灯也停止然后全部开始闪烁，3秒后（用T0定时）流水灯全部关闭、数码管上显示出“HELLO”。到此保持住。 -nixie tube