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  1. kzbg

    0下载:
  2. 89s52 AD转换 1602显示其光通量然后控制灯的时间-89s52 AD converter 1602 and then control the lights display the time of flux
  3. 所属分类:SCM

    • 发布日期:2017-04-08
    • 文件大小:27.9kb
    • 提供者:mlm
  1. ad

    0下载:
  2. 采集光信号经AD转换,并通过1602显示器光亮度-Light signals collected by the AD converter, and by 1602 the display brightness
  3. 所属分类:SCM

    • 发布日期:2017-04-16
    • 文件大小:27.78kb
    • 提供者:mlm
  1. pipelined_fft_64_latest.tar

    0下载:
  2. This containg pipelined FFT code for FPGA.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-25
    • 文件大小:86.87kb
    • 提供者:Manasi
  1. kbandmseD12

    0下载:
  2. 基于PDIUSBD12的键盘、鼠标源代码-PDIUSBD12-based keyboard, mouse source code
  3. 所属分类:SCM

    • 发布日期:2017-04-03
    • 文件大小:181.17kb
    • 提供者:大强
  1. CPU

    0下载:
  2. cup developed by scope verilog
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-01
    • 文件大小:9.12kb
    • 提供者:wei chenghao
  1. gap_finder

    0下载:
  2. Design a sequential machine that finds the size of the largest gap between two successive 1s in a X-bit word. Partition the design into a state machine controller and a datapath. The datapath accepts the X-bit word and produces an output word whose v
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-28
    • 文件大小:557.37kb
    • 提供者:wei chenghao
  1. ass1_3_safe

    0下载:
  2. The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last “X” digits ) of 8 digits.-The objective of thi
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-09
    • 文件大小:1.3mb
    • 提供者:wei chenghao
  1. ass1_2_hamming

    0下载:
  2. Hamming codes are a class of binary linear codes. They can detect up to two simultaneous bit errors, and correct single-bit errors. In particular, a single-error-correcting and double error detecting variant commonly referred to SECDED.-a) Develop a
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-09
    • 文件大小:1.08mb
    • 提供者:wei chenghao
  1. SPI_system

    0下载:
  2. This a SPI for DE_2 board.The file sampling frequency is 20Khz and board frequency used by this 27Mhz.The slaver chip is MCP2302 working under 3.3V.Finally the input analogue voltage for CH0 is between 0V and 3.3V -This is a SPI for DE_2 board.The fi
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-09
    • 文件大小:1.6mb
    • 提供者:wei chenghao
  1. fullcan

    0下载:
  2. fullcan , Can 总线函数库。可以方便快捷的使用Can总线协议。-fullcan, Can Bus library. Can be convenient and efficient use of bus protocol.
  3. 所属分类:SCM

    • 发布日期:2017-04-24
    • 文件大小:17.42kb
    • 提供者:王军
  1. J-Link-V8

    0下载:
  2. Arm Jtag Debug Software and Hardware
  3. 所属分类:ARM-PowerPC-ColdFire-MIPS

    • 发布日期:2017-03-27
    • 文件大小:740.95kb
    • 提供者:房有定
  1. AD

    0下载:
  2. ad 转换 模拟输出,数字输入 单片开发,中国地质大学同学小学期实习所用实例-ad zhuanhuan
  3. 所属分类:SCM

    • 发布日期:2017-04-03
    • 文件大小:14.31kb
    • 提供者:zengdi
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