资源列表
GPIO
- DSP GPIO APP009 C Code
pll
- DPLL由 鉴相器、 模K加减计数器、脉冲加减电路、同步建立侦察电路、模N分频器构成. 整个系统的中心频率(即signal_in和signal_out的码速率的2倍)为clk/8/N. 模K加减计数器的K值决定DPLL的精度和同步建立时间,K越大,则同步建立时间长,同步精度高.反之则短,低. -DPLL by the phase detector, K addition and subtraction counter mode, pulse subtraction circuit, sy
test
- APP009 C Code DSP test
Timer
- Timer APP009 DSP C Code
SVPWM3
- APP009 DSP SVPWM C Code
SVPWM1
- SVPWM APP009 C Code DSP
PWM
- APP009-PWM code DSP code
code
- 实现一个基于51单片机的超声波测距源码，通过USB与PC通信-The realization of a microcontroller based ultrasonic ranging source 51, through the USB and PC communication
table_sin120
- Sine table 120 degree for pwm generation
main_space_vector_PWM
- svpwm code with AVR AT90PWM3
dac
- dac for acim control AVR micro
adc
- adc code for acim control AVR micro