资源列表
4bit-adder
- 4 FIT ADDER FULL EXAMPLE IN VHDL LANGUAGE
polynominal-multiplier
- verilog code for polynominal multiplier
code
- verilog code for intrusion matching
2nd-wrk-(1)
- verilog code for shifting of multiplier
1st-wrk
- multiplier code using verilog
eth
- 基于verilog语言的以太网接口的fpga实现，用在无线通信领域，供参考-The Ethernet interface based on verilog language fpga implementation, used in the field of wireless communications, for your reference
pro_1588
- 基于verilog的1588V2协议的fpga实现，目前项目通用代码，供大家参考-Based on verilog 1588 v2 fpga implementation of the agreement, the project general code, for your reference
fft_ifft
- fft and ifft code in verilog
ATT7022E
- ATT7022E的完整头文件，ATT7026E和ATT7028E也同样适用。-ATT7022E s full header file, ATT7026E, and ATT7028E are equally applicable.
code
- high pass filter and low pass filter
SRIO-phy-code
- SRIO接口物理层的实现代码，非常复杂，完全自己用verilog编写，支持5G速率，可以作为开发参考-SRIO interface implementation code, the physical is very complex, completely written in verilog, support rate of 5 g, will be helpful to the development
magnetmeter
- 该程度读取读取5883L数据，以及读取SMGA三轴磁力计数据，使用的是spi通信方式，通过串口发送数据-Read Read the extent 5883L data, and reading SMGA triaxial magnetometer data, using spi communication, through the serial port to send data