资源列表
mux41we
- 4:1 multiplexer using with select.. Test Bench included-4:1 multiplexer using with select.. Test Bench included..
penc81
- 8:1 priority encoder.. Test Bench included-8:1 priority encoder.. Test Bench included..
asyn_counter
- async counter,, test bench included-async counter,, test bench included..
async_FlipFlop
- asynchronous D-FlipFlop & JK-FlipFlop.. with test bench.
ddr_sdr_V1_1
- DDR控制器 - 用XILINX Virtex II FPGA实现 - 使用DDR MT46V16M16作为仿真模型 - 通用化-DR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted
ESS
- C Routine for a Infrared Communication with PIC
source
- C Routine for RS232 communication PIC 16F8-C Routine for RS232 communication PIC 16F877
STEP
- Routine for a stepper motor with PIC16F8-Routine for a stepper motor with PIC16F877
EXDTMF
- a C Programm for a DTMF pic16F8-a C Programm for a DTMF pic16F877
SERVO
- C routine for a servo motor PIC
interr_timer0
- interruption routine for PIC16F8-interruption routine for PIC16F877
16876
- C routine for LED (PIC16F876)