资源列表
lunwenVHDL
- 毕业设计vhdl论文的先期工作。对于大学毕业设计论文有重要作用-Graduate design vhdl advance work papers. For the university graduation thesis plays an important role
vhdl
- vhdl跑马灯 适合初学者同学...流水灯的制作-vhdl Marquee for beginner students to the production of light water ...
testbench
- 详细介绍了在vhdl语言仿真中怎么编写测试平台代码.-introduce how to write testbench in VHDL
test
- Verilog HDL SDRAM controller
pisca
- machine with 16 possible states flip flop desmultiplexor language VHDL with fpga cyclone 3
mjpeg-decoder_latest.tar
- 基于fpga实现的硬件jpeg格式图片的解码器-jpeg decoder based on FPGA
usbtrace[1].v1.1
- usb2.0 trace verilog code very useful
VRML
- 详细介绍VRML语言，并且包含一些例程，使初学者能够快速的对它有一个全面的认识。-Details of VRML language, and contains a number of routines, so that beginners can quickly have a comprehensive understanding of it.
UART
- 實作UART 介面 4 byte 傳送 或 4 byte 接收 開發環鏡 quartus 且 附模擬檔-4 byte real interfaces for UART transmission or 4 byte receive loop mirror quartus and the development of simulation files attached
MIT_Press-Circuit_Design_with_VHDL(2005)
- MIT Press - Circuit Design with VHDL (2005)
DDS_verilog
- 通讯中常用的dds模块的verilog源码打包下载-Communications commonly used in dds module verilog source code package to download
fre_devider_double
- 硬件中常用的偶分频电路的Vhdl源码，很有用-Even commonly used in hardware divider circuit Vhdl source code, useful