资源列表
project
- convolutional encoder vhdl code, rate 1/2, k=3
viterbi
- viterbi decoder with convolutional encoder
pro
- 小球游戏，是基于fpga自己编写的一个小球游戏-A small ball game is based on fpga have written a small ball game
top
- 简单cpu设计 -包括内存单元，运算单元，数据及模块同步单元，状态机单元-CPU design- include memory module, alu module, synchronization module(data and block), finite state machine module
FPGACPLD(datang)
- FPGACPLD数字电路设计经验分享(大唐).pdf
VerilogHDL
- VerilogHDL的135个经典设计实例.rar
ispLEVER
- eetop.cn_ispLEVER培训教程FPGA设计流程.rar
mimzy
- FPGA ucLinux Board reference design, using Xilinx s Spartan3 FPGA (XC3S400)
FPGA_Board_Reference_Guide_1.0
- annother FPGA ucLinux Board reference design, using Xilinx s Spartan3 FPGA (XC3S400)
Nexys_sch
- annother FPGA ucLinux Board reference design, using Xilinx s Spartan3 FPGA (XC3S400)
RedBoot_To_ML403
- this guide describle how to port redboot into ML403 power PC platform
fpgavgavhdl
- fpga驱动vga接口的vhdl语言实现,实现彩条及方块-fpga driver vga interface vhdl language implementation to achieve color bar and the box