资源列表
EPM240VHDLVERILOG
- 大量的Verilog和vhdl源程序学习cpld好资料-Verilog and vhdl lot of good information source to learn cpld
ddr_code
- 基于FPGA的DDR SDRAM控制器的VHDL硬件描述语言-FPGA-based DDR SDRAM controller VHDL hardware descr iption language
FPGA
- 基于FPGA 的射频热疗系统的设计，用硬件描述语言VHDL 语言，来解决一些实际工程中遇到的问题。-FPGA-based design of RF hyperthermia system, using hardware descr iption language VHDL, to solve some practical engineering problems.
fcfs
- First come First serve Algorithm
ALUC
- 用verilog语言中xilinx平台上实现single ALU,包括alu的基本MIPS指令运算,ALU control的实现-Xilinx verilog languages with the platform to achieve single ALU, including the basic MIPS instructions alu operations, ALU control implementation
Dabija
- my program is in fact a keyboard linked to spartan III fpga...when u presed a button it will be showed on the bcd of the fpga
e212a_laboratoare_xilinx
- there are some labs made by me .you will find her: a counter,a codificator,decodificator,and some others
bit4_mul
- vhdl写的程序，并行4位乘法器 加快流据传递，提高算法效率-bit4_mul
hw_for_sw
- vhdl. verilog,实用例程,希望对大家有帮助
Spartan3E_ADC
- 专门针对xilinx 的spartan3e开发板上的ADC转化的编程，绝对可用，仿真通过-Xilinx the spartan3e specific development board ADC conversion program, absolutely free, simulation by
cof
- 咖啡机的基本设计，是HVDL语言描写的，用于基本的咖啡机控制-cafe
Solutions
- `timescale 1ns / 1ps module AND_OR(INP, OUT1) input [3:0] INP output OUT1 wire SIG1, SIG2 MY_AND2 U0 (.A(INP[0]), .B(INP[1]), .C(SIG1)) MY_AND2 U1 (.A(INP[2]), .B(INP[3]), .C(SIG2)) MY_OR2 U2 (.A(SIG1), .B(SIG2), .