资源列表
vga_lcd
- VGA LCD interface Uses gray codes to move one clock domain to the other. Flags are synchronous to the related clock domain - empty: synchronous to read_clock - full : synchronous to write_clock-VGA LCD interface Uses gray codes to
e1-framer
- e1 framer / de-framer based on itu-t standards state machine using GRAY CODE (or trying to use GRAY CODE
ddr_sdr
- DDR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted to any other DDR SDRAM device-DDR SDRAM Controller Core - has been designe
jpeg-coder
- EV_JPEG_ENC core is intended to encode raw bitmap images into JPEG compliant coded bit stream. JPEG baseline encoding method is used.
ex15
- vhd数码管测试源码，同时六个数码管控制，显示。-using ALTERA s FPGA design, QUARTUS software development platform.
CLOCK-CODE-VHDL
- VHDL源码程序，功能完整的时钟电路代码-using ALTERA s FPGA design, QUARTUS software development platform.VHDL CARD,
irdaGET
- 红外通讯接收，irda通讯接收，红外通讯测试-Infrared communications received, irda communications received infrared communication test
sed
- CPLD数码管程序,详细的7段式数码管程序。-CPLD verilog program
cal
- 针对CPLD实现简易计算器的程序。全部程序都在了。-cpld cal program
123
- 配置CPLD的引脚，控制LED灯，实现霓虹灯的效果。-CPLD program
sd_test
- sd 卡初始化，读写测试 xilinx spartan6 fpga-sd card initialization, read and write test xilinx spartan6 fpga
sht30
- 温湿度传感器SHT30驱动，功能实现从传感器中读出数据。-sensor sht30 driver. read temperature and humidity data sensor.