资源列表
FPGA4U
- 采用Altera公司的CycloneII芯片EP2C8的一些程序代码。-The use of Altera Corporation CycloneII chip EP2C8 some program code.
DW_8b10b_enc.v.tar
- amba ahb protocol with test benches
pong
- Pong is a mixed schematic, VHDL, Verilog project featuring the PS2 and VGA monitor connections of the Xilinx\Digilent Spartan-3 demo board.
gold_code_vhd_217
- Gold Code Generators in Virtex Devices
freqm
- a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display
jc2_vhd
- JC2_VHD is a bi-directional 4-bit Johnson counter with stop control
halfband
- verilog写的39阶通带为20KHz的半带fir滤波器，经测试正确。-verilog halfband FIR
cross_street_lights
- Cross street lights driver in VHDL. It have been tested on XILINX 9500.
word
- Code was successfully implemented within ALtera FPGA with Quartus 6.0. It presents two polish own female names: ULA and ALA whose are scrolling on the 4-columns crystal LED. When you press the switch it will turn from ULA into ALA and continue scroll
ring
- Ring register[1 from 8] which seven speeds. The result is presented on 8 LEDs. After every cycle, speed grows. The process starts again after last 8 cycle.
counter
- Decimal counter which is counting from 256 to 0. After that there will appear logic "1" in out. You can stop counting by pressing sequence. I called it detonation clock :]
lift
- VHDL driver of lift in building. Result is presents on LED segments[decimal value].