资源列表
fpga.fifo
- 异步FIFO是用来适配不同时钟域之间的相位差和频率飘移的重要模块。本文设计的异步FIFO采用了格雷（GRAY）变换技术和双端口RAM实现了不同时钟域之间的数据无损传输。该结构利用了GRAY变换的特点，使得整个系统可靠性高和抗干扰能力强，系统可以工作在读写时钟频率漂移达到正负300PPM的恶劣环境。并且由于采用了模块化结构，使得系统具有良好的可扩充性。-Asynchronous FIFO is an important module which always used to absorb the
myfifo
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
Finit_state_machine_in_C
- C实现一个状态机,我做毕业设计，实现自组织网络，三个节点-Finit state machine implemented in C code
myfifo_syn
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_wave0
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
myfifo_wave1
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
fifo-interface
- fifo(1-6:1):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
FIFOinterface
- fifo(8):using ip-code and rd wd interface-fifo:using ip-code and rd wd interface
quartus-reading-and-thinking
- 本资料详细介绍了quartus11的使用方法和使用quartus11进行硬件详细开发流程。-quartus11：simple using the quartus11 sofeware .
tlv5636
- 音频DA tlv5636的接口程序 经过硬件测试的成功 学习状态机对器件编程的经典-DA tlv5636 audio through the interface program to test the success of hardware 。state machine to study the classic programming device
alu
- verilog code for alu in RISC processor
1
- eda技术与vhdl9第二版）的教程，是我们老师自己做的课件，这是第一章。-eda technology and vhdl9 second edition) of the tutorial, our teachers are to do their own courseware, which is the first chapter.