资源列表
geshihua
- 读取文件的数据,并且按照一定的栏位排序.-Read the data file, and in accordance with a certain sort column.
verilogdesign1
- 硬件描述语言设计相关,包括一些国外大学的教案和设计资料-verilog
verilogdesign2
- 硬件描述语言设计相关,包括一些国外大学的教案和设计资料-verilog
FPGA
- 很好的学习FPGA、SOPC开发简明教程-FPGA.rar
FPGA
- FPGA和单片机串行通信接口的实现,VHDL的源代码。-And single-chip FPGA realization of serial communication interface, VHDL source code.
XilinxISE8
- This tutorial gives a descr iption of the features and additions to Xilinx® ISE™ 8.2i. The primary focus of this tutorial is to show the relationship among the design entry tools, Xilinx and third-party tools, and the design implementatio
niosII
- NiosII 之软件调试技巧,資料不錯請參考-NiosII of software debugging skills, good information please refer to
DE1_synthesizer
- ALTAER de1 cd 參考資料,請下載-Reference ALTAER de1 cd, download
910201
- 使用SOPC Builder 快速建立 Embedded System-SOPC Builder to quickly create the use of Embedded System
DDS
- 基于DDS原理的几种信号发生器的设计的几篇论文,使用FPGA平台或者FPGA和PC共同平台实现-DDS-based signal generator several principles of design, the use of FPGA or FPGA platform and a common platform PC
SunFiles
- vhdl network links and main key for installation
ImplementLUT-baseFIRFilterwithVHDL
- 用VHDL语言实现查找表方法有限冲击响应滤波器-VHDL language used lookup table method to achieve finite impulse response filter
