资源列表
PWMGenerator1
- 介绍：仅仅实现8bitPWM功能，没有别的功能，通过设置data数据可以设定占空比 频率是clk/255 HZ-Introduction: 8bitPWM only the realization of functions, no other function, data can be data by setting the duty cycle frequency is set clk/255 HZ
fpga
- 非常 好的资料，大家积极下载！大家一定一定要好好学习-Very good material, actively download!
RAM
- 曾经做过一电子竞赛课题部分，硬件描述语言VHDL做数据存储器512位存储深度，-Competition has been a subject of electronic parts, hardware descr iption language VHDL do data memory storage depth of 512,
dds2
- 同样逻辑分析仪中部分硬件描述语言VHDL做的DDS模块，-The same part of the logic analyzer in VHDL hardware descr iption language modules do DDS,
TRIGER
- 触发方式，多种触发方式包括序列触发，和电平触发等多种触发，可以做到16路输入-Trigger mode, trigger a variety of ways including the sequence of the trigger, and trigger-level trigger, etc., can do the importation of 16
EDA_VHDL_1C3
- EDA初学者程序，其中包括多个VHDL源程序，可供初学者阅读提高，非常有用！-EDA beginners program, including a number of VHDL source code for beginners to improve reading, very useful!
FreCore8051
- 基于ACTEL FPGA的测频模块,测频精度非常高！-ACTEL FPGA-based module of the frequency measurement, frequency measurement accuracy is very high!
codeoffrequencydemultiplication
- 分频程序，用vhdl语言编写的，适用于fpga初学者。-frequency demultiplication
cpu
- 使用VHDL语言编写的一个简单的cpu，包含详细的解释，有兴趣的可以看看。-describle a cpu by VHDL
HG_chufaqi_clajiafaqi
- VHDL基-16位的无符号除法器，超前进位加法器可改位数。-VHDL-based-16 bit unsigned divider, CLA can be the median.
db0358fc-1f16-4f07-9f0f-defb77998bb1
- fpga实现简单的计数器功能，用vhdl写的，有一个LED-fpga simple counter function
fuzzy_inanalyser
- VHDL模糊PID控制控制器模糊化程序。-Fuzzy PID control of VHDL programming fuzzy controller.