资源列表
mypjct
- 自己的一次设计，用verilog语言实现的一个自动售票机的设计-One' s own design, using verilog language implementation of the design of an automatic vending machine
ntc
- NTC电阻在VERILOG HDL中的曲线表，使用1MA恒流源供电，用AD对其采集电压，并以12BIT形式输出查表即可达到实际温度值，本表占用450个12位存储单元-NTC resistor VERILOG HDL in the curve of the table, use the 1MA current source power supply voltages were collected with AD and in the form of the output look-up table
divider
- a clock divider vhdl code
vhdl_serial_receiver
- a good serial receiver in vhdl , there is also transmitter code along with this , check it in same web
viterbi_binary_hard_c
- vhdl code for viterbi decoder
shuzizhong
- 多功能数字钟的设计，可显示时－分－秒、整点报时、小时和分钟可调等基本功能。-Multifunction digital clock designed to display- minutes- seconds, the whole point timekeeping, hours and minutes, adjustable and other basic functions.
VGA
- VGA彩条信号发生器的设计。用到了RGB三基色来组成八种颜色构成彩条信号。-VGA color bar signal generator design. Use of the RGB three primary colors to form the eight kinds of colors of color bar signal.
music
- 是完成一小段音乐程序的开发，然后再用扬声器进行试听。下面主要介绍一下完成本实验的几个主要部分的工作原理。-Is the completion of the development of a short musical program, and then re-use loudspeakers to Lyrics. Following the completion of this experiment focuses on what part of several major works.
PS2xianshi
- FPGA设计简单通信协议的方法。 了解PS2的工作原理，扫描码的ASCII码的转换。 -FPGA design of a simple communication protocol method. Learn PS2 works, scan code ASCII code conversions.
12130_ARM_Core
- arm 核，VHDL语言描述的IP软核，仅供学习-arm-core, VHDL language to describe the IP soft core, only to learn
counter
- 基于VHDL的计数代码，可用于FPGA芯片对步进电机的控制-Count based on VHDL code for FPGA chips can be used to control stepper motor
EDK_81
- 视频文件 EDK_81,xilinx spartan-3-EDK_81,xilinx spartan-3