资源列表
modelsim-using-guide
- modelsim Altera 5.3的使用教程，适合初学者了解第三方仿真工具。-handbook for modelsim Altera 5.3.It is helpful for learning FPGA.
fsk_modem_design
- fsk调制解调器，仿真并FPGA下载测试正确，供大家交流！-fsk modem, simulation and FPGA download the test correctly for all to share!
VerilogHDLcxsjjc
- VerilogHDLcxsj-VerilogHDLcxsj
Proyekton
- alarm clock div clk full adder and half adder
verilog
- This book provides a comprehensive introduction to the modern study of computer algorithms. It presents many algorithms and covers them in cons iderable depth, yet makes their design and analysis access ible to all levels of readers. We have trie
fulladder
- Simple four bit full adder using concatenation in VHDL.
DE2_LCM_CCD_inverse
- DE2版自带的CCD驱动，将图像存储于SDRAM中-DE2 version comes with the CCD driver in the image stored in SDRAM
fsm
- Sequence detector "1100101101" using FSM(Finite State Machine) in VHDL.
8bitmultiplexer
- Simple eight bit multiplexer using VHDL.
timer1
- 3 digit 7-segment display timer using VHDL.
4bitcomp
- 4 bit comparator using VHDL.
AD7705
- Verilog AD7705代码 对AD7705实时进行控制-Verilog AD7705 AD7705 real-time control code