资源列表
SPI_Master
- spi 主发送模块，功能已测试没有问题，各个信号已标注(SPI main send module, the function has been tested, no problem, each signal has been marked)
project_linux_1.tar
- 实现led流水作业，配有约束文件，初学者可以看一下，希望有帮助对你！(it can be run on the debian 9,just a led program with file ,like to help you!)
fifo_FPGA
- 68013 FIFO 接口程序，USB开发、VHDL开发(68013 FIFO USB VHDL FPGA)
I2C
- I2C配置接口，verilog源代码。。。。。。。。。。(The I2C configuration interface Verilog source code)
sdram_verilog
- verilog实现外部sdram读写功能，实测可用(SDRAM read and write function by verilog)
clock
- 数字时钟的实现，数码管显示，实现时分秒的显示(The realization of the digital clock)
Beautiful Restful API in ASP.Net Core
- restfull api for the team to beryfy what is the p[robme
MVA15_Japan_Harris_FPGA_Vivado_source
- Harris 角点检测 FPGA实现 Tak Lon Chao, Kin Hong Wong, "An efficient FPGA implementation of the Harris Corner feature detector" Code:in VHDL and Verliog running on Zedboard(Tak Lon Chao, Kin Hong Wong, "An efficient FPGA implementation
xuartps
- microblaze uart 中断方式(microblaze uart using interrupt)
xuartps_intr_example
- microblaze uart vivado(vivado microblaze interrupt)
make_pwm_block
- 内置宽度和频率寄存器，可调制宽度和频率得PWM(Built-in registers, width and frequency PWM modulation width and frequency)
一个简单的UART
- 实现串口基本功能，具有奇偶检验，主时钟与波特率相差16倍(Basic function, a serial port with parity check, master clock and the baud rate is 16 times clk)