资源列表
pudn
- Encoders, decoders and RAM Model
vhdl_ram
- Fast generic RAM model
vhdl_rand
- Linear Feedback Shift Register (LFSR)/Random number generator
AT25160B
- 该代码完成存储器的数据存储和读取功能，该芯片是一款Atmel的SPI接口的EEPROM存储芯片。(The code completes the memory data storage and reading function, the chip is a Atmel SPI interface EEPROM memory chip.)
AN-877-通过SPI与高速ADC接口
- 高速ad配置程序，spi中文资料，详细介绍了adi公司ad产品的配置流程(High speed AD configuration program, SPI Chinese data)
xilinx_lib.tar
- 用于modelsim仿真的xilinxfpga平台IP库，以ise 13.x为基础制作，在modelsim10下验证通过。(xilinx IP core library for modelsim simulate, based on ise 13.x, verified in modelsim10.)
MAKEAMIF
- 用于生成xilinx开发环境中存储器ip core的mif数据文件的程序代码。(this program is used to generate mif file used by xilinx memory ip core.)
MAKEXCOE
- 用于生成xilinx开发环境中存储器ip core的coe数据文件的程序代码。(this program is used to generate coe file used by xilinx memory ip core.)
crc8_8_serial
- 自己编写的高效8位输入串行CRC-8 ATM程序(an effective program for 8bit serial input CRC-8 ATM calculate.)
bus
- 公交车系统基于FPGA芯片的基础上，增加了数码管显示模块、语音自动报站模块、红外通信模块。站牌系统采用以FPGA为核心的主控芯片，增加液晶显示模块、红外通信模块、RS232总线模块、指示灯显示模块等。(The bus system is based on FPGA chip. It adds digital tube display module, voice automatic reporting module and infrared communication module. The bu
heartbeat
- 整个程序由心率传感器模块，体温传感器模块，3D计步器模块，FPGA开发板，A/D转换器，LCD显示屏等组成。(The entire program module by heart rate sensor, temperature sensor module, 3D pedometer module, FPGA development board, A/D converter, LCD display etc..)
dianziqin
- 基于FPGA的电子琴动态录音与回放系统在FPGA的基础上设计系统的核心功能模块，再配合相应外围电路，在实现了电子琴基本功能的同时，还增加了演奏音乐的存储功能。(The core function module of FPGA electronic organ dynamic recording and playback system based on FPGA based, together with the corresponding peripheral circuit, in the re