资源列表
VHDL_for_clock
- 基于VHDL语言的数字钟设计，附有完整的程序代码，并有仿真结果。-VHDL-based digital clock design, with a complete code, and have the simulation results.
B_PON_OLT_VHDL
- ATM-PON(Passive Optical Network) OLT vdhl proj.file
B_PON_ONU_VHDL
- ATM-PON ONU vhdl proj. file good luck
UART
- 是使用ISE实现UART通信功能，可以提高你的FPGA能力。-Is to use the ISE implementation UART communication can improve the ability of your FPGA.
2x4_decoder
- 2*4 decoder program in verilog
bitadder
- verilog code for 4 bit adder
4x1_mux
- verilog code for 481 mux
4x2_priorityencoder
- verilog code for priority encoder
bcd_adder
- verilog code for bcd adder
XilinxFPGA1.1
- 十分钟学会Xilinx FPGA 设计浅显易懂的学习书，为FPGA的初学者提供很好的参考-10 minutes Society of Xilinx FPGA design easy to understand book learning, for FPGA to provide a good reference for beginners
Springer_2006_SystemVerilog_for_Verificatio_Chris
- A Guide to Learning the Testbench System Verilog Language Features
TLC5510
- tlc5510的vhdl程序，有详细的工程文件，为初学者提供很好多的资料-tlc5510 of vhdl procedures, detailed engineering documents, in order to provide a good amount of information for beginners