资源列表
bcd-decoder
- 用Verilog实现的BCD译码器. 经Quartus||波形仿真无误 经硬件验证无误-BCD decoder Realized by Verilog
EP3C8020111219125810_ROM_OK5
- 采用DSP builder v9.1实现正交两路单频输出，已经在EP3C80上面跑通，经实际验证是正确的。此例程非常简洁明了，可以作为DSP builder的入门示例。里面已经包含了生成好的modelsim仿真示例和仿真结果。-Achieved using DSP builder v9.1 orthogonal two single-frequency output, has been run through the EP3C80 above, are proven to be correct.
VerilogHDLdesignexample
- VerilogHDL设计实例及其仿真与综合-VerilogHDL design example and its simulation and synthesis
VerilogHDLAD7862
- 运用VerilogHDL实现AD7862的数据采集设计-VerilogHDL achievement of the use of the data collection design AD7862
143637___fpgas_and_cplds
- vhdl couter 3 bit and make by vhdl and vhdl
VAEP2C8
- FIRST DRAFT USER MANUAL ABOUT VA-EP2C8 FPGA DEVELOP BOARD
cycloneIII3c120dev
- This document describes the hardware features of the Cyclone® III development board, including detailed pin-out information to enable you to create custom FPGA designs that interface with all components of the board.-This document describes the ha
CPU_Architecture
- Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks. External hardware accelerator is used for network packet processing. The common netw
vga
- Xilinx FPGA verilog程序,用于控制VGA接口控制CRT显示器工作，使其实现色彩条显示-Xilinx FPGA verilog procedures VGA interface control used to control the work of CRT monitors to achieve color display article
cp_uart_6
- 用CPLD驱动UART转USB芯片CP2102的verilog代码，与PC通信 包括CP2102的配置 驱动等-Using CPLD to drive the USB-UART CP2102 interface. verilog code, then communicate with PC, including the configuration and drivers, etc.
VHDL
- 这是学习VHDL语言很好的电子书，对VHDL语言的编程规则作了很详尽的讲解，源码例子解释也相当详细-This is a very good learning VHDL language e-books, on the rules of VHDL programming language had a very comprehensive presentation, source code is also a fairly detailed explanation of examples