资源列表
EasyFPGA060_Routine_SynFIFO
- EasyFPGA060 同步FIFO实验-EasyFPGA060 synchronous FIFO test
FIR_Filter
- verilog的32阶FIR低通滤波器描述-verilog 32-order FIR low-pass filter described
dds
- DDs直接数字频率合成器的源代码，其中包括采用IP核和普通两种方式
dtysky-FPGA-Imaging-Library-c8cd350
- 一个hls视频库ip libraries，里面包含各种功能的ip核，可进行复用。-A hls video library ip libraries, which contains a variety of functions of the ip core can be reused.
319
- 简单的手表程序，实现调节时间，及手表正常运行-Simple watch program, it adjusts the time, and watch the normal operation
PCIE_quartus14.1_tutorial1
- altera的PCIE硬核 仿真教程，采用工具quartus14.1和modelsim10.1，PIO方式，有一定讲解-PCIE tutorial，tools quartus14.1 and modelsim10.1,PIO example
Task1
- verilog code for a full adder
sram
- FPGA 读写 SRAM 存储块，verilog代码(Read and write SRAM memory block and Verilog code in FPGA)
DE2_USB_API
- USB画笔，基于altera de2平台，全都有啦，很好的例子-USB brush, based on altera de2 platform, all have friends, a good example. .
third
- 用VHDL语言实现了一个有符号除法的程序，用移位相减实现。-Just like
yiwei
- 运用Verilog 语言实现了4位的一位计数器的设计。-The use of Verilog language, a 4-bit counter design.
TW6816
- TW6816 – 4-CH Audio/Video Decoders with 66MHz PCI interface. Preliminary Data Sheet.