资源列表
Bicycle
- 健身自行车控制器。说明在文档中。这是我第一次发布代码，谢谢分享！-Fitness bike controller. Instructions in the document. This is the first time I released the code, thanks for sharing!
CPU8bit
- 复旦大学 计算机体系结构实验 8位cpu-8bit cpu
AD9226
- 一个AD9226芯片的驱动，用FPGA写的。虽然简单，但是希望对各位有帮助-An AD9226 chip driver, FPGA written. Though simple, but I hope you will help
stopwatch
- 这个程序是用verilog语言编写的秒表的小程序，可以精确到秒，有具体的程序，在开发板上实验成功！-This program is written in verilog stopwatch with a small program that can accurately to the second, there are specific procedures, the development board experiment is successful!
sWave.rar
- 正弦波，Verilog波形发生器，很好的东西,Sine wave, Verilog waveform generator, a good thing
BarcodeScan
- 条码扫描模块.rar；基于FPGA-2C35核心；博创实验箱平台。 串口设置：波特率57600bps,Parity: None Data:8 Stop:1-Bar code scanning module rar core Borch experimental box platform based on FPGA-2C35. Serial port settings: baud rate 57600bps, Parity: None Data: 8 Stop: 1
hdl-2015_r2
- AD9361 IP核，Windows版本，Vivado2015.2(AD9361 IP core, used on Windows, Vivado2015.2)
wtut_ver
- stopwatch 源代码基于ISE14.2-stopwatch source code is based ISE14.2
8251
- 8251的完整的功能的实现,可以进行编译,综合.
FreCounter
- 中国地质大学sopc实验课程序。大三下学期！-China University of Geosciences sopc Lab program. Junior next semester!
S3_WAVE
- 用Altera公司生产的FPGA仿真SignalTAP程序，用QuarusII6.0编译 -Produced using Altera FPGA simulation SignalTAP program, compiled with QuarusII6.0
fenpin
- 一个简单的分频器，可实现时钟分频，可修改参数实现不同分频-A simple divider, clock divider, can modify the parameters to achieve different divider