资源列表
65filter
- 65位FIR数字滤波器的设计~~其中有通过仿真得出得数据 ~可以通过数据输入完成滤波实验~对数字滤波器得整个算法进行了分析包括输入分组相加 然后相乘得过程-65 FIR digital filter design ~ ~ with simulation data to come in through the importation of data from experiments completed filtering of the digital filter in the whole alg
tcdg.vhdl
- des vhld 源码 程序完成了DES的编码和解码功能-des vhld source procedures completed DES encoding and decoding
dds_vhdl
- dds的vhdl实现,主要包括正弦波、三角波和锯齿波的产生-dds achieve the VHDL, including sine, triangle wave, and the selection ramp
DE2_115_Audio
- FPGA开发板所带的示例程序，实现音频信号的采集，处理和输出，用verilog语言编写，可直接编译下载，非常有学习和参考价值-FPGA board comes with sample programs, audio signal acquisition, processing, and output, using Verilog language can be compiled directly download very learning and reference value! ! !
RISC
- hrisc cpu，为何只有vhdl选择呢？大家都用verilog的啊-hrisc cpu why only VHDL choice? We all use the Verilog ah
video_from_opencore
- 全电视信号编码器，verilog的，看看有借鉴价值否？-video signal encoder, Verilog, to see whether the reference value?
OpenRISC
- 一个开放的risc，已应用到实际中，可以借鉴的不少，大家-an open RISC, has been applied to practice, we can draw a lot, we look at
nios22_demo
- nios实例源码 相关代码-the nios instance source related code
VHDLExperiment01
- VHDL源码实例 相关源码-VHDL source code examples
blockram
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
ml50x_schematics
- xilinx公司的virtex-5开发板原理图 需要的可以下载看一下 希望对你有帮助-xilinx company virtex-5 development board schematics can download look you want to help
sdr_c_trl_verilog
- SDRAM 控制器的Verilog代码 经过综合验证过的.无截压密码-SDRAM controller Verilog code comprehensive test after all. No cut-off pressure Password