资源列表
CIC-filter-master
- Code Verilog CIC Filter FPGA
4 level
- verilog四级触发链 简化代码 可以运行在FPGA平台上(Verilog 4 level flip-flop)
0011.DBCONN
- File list(Click to check if it's the file you need, and recomment it at the bottom):
7232
- Space target recognition algorithm using PM, Maximum Likelihood (ML) criteria and maximum a posteriori (MAP) criterion, ECG data and includes source code written in MATLAB.
led_water
- 酷睿系列流水灯通用程序，来回往返流水，点亮led(ledwater for ep2c8q208c8)
比较器1
- 实现两个数字的比较大小，包括顶层文件和源文件以及测试文件。(To achieve the size of the two figures.)
8-tile-puzzle-master
- BVNGBFGJHN SDOIV KJCXVN DVK DVOI V DVNKL LV
VCS
- vcs介绍使用方法 介绍如何具体使用synopsys公司的软件(VCs describes the use of the method)
step_motor
- 2相混合式步进电机驱动程序，配套MC860H驱动器，共阴极接法 EN提前DIR至少5us，正常工作为高电平 DIR提前PUL下降沿5us确定其状态高或底，DIR 高：正转，底：反转 PUL脉冲信号，高电平不小于2.5us，低电平不小于2.5us(2 phase hybrid stepper motor driver, matching MC860H driver, common cathode connection method.EN advance DIR at least 5us, n
div
- 运用verilog语言实现将频率分为二倍的作用。(two divided-frequency)
Dm9000aep_Protocol
- 基于DM9000AEP的网络协议，Dm9000aep_Protocol.v(DM9000AEP based network protocol,Dm9000aep_Protocol.v)
the example of FPGA principle and application
- 该文件为特权同学FPGA开发板打造的同步练习，里面有详细的例程和操作步骤。(The document for the privileged students FPGA development board to create synchronized exercises, which have detailed routines and steps.)