资源列表
Alarm
- The aim this project is to implement the functionality of a digital alarm clock on a FPGA. As soon as the FPGA is switched on, the clock starts. The alarm can be set using the dip-switches provided on the FPGA board. This is indicated through the LED
16-bit-crc16
- 16位并行输入输入的CRC16,已验证无错误-16-bit parallel data input crc16, algorithm logic has been verified
hello_world
- 基于nisoII软核的摇摇棒设计，带中断-Rod shook nisoII soft-core-based design, with interrupt
ise_tutorial_ug695
- 非常有用的数字电路设计用书，也很适合初学者-useful for digital circuit design
rs_jianhua
- 实现rs编码器，用于基带信号的编码和解码，纠错编码-useful for digital siginal rs coding
jishuqi
- Verilog实现计数器功能，开发环境是Quartus-I dont know
jpsm
- 基于VHDL语言的4*4矩阵键盘扫描代码-Matrix keyboard scan
flow_led
- xilinx kc705用verilog写的流水灯程序-the program with verilog by kc705 of xilinx
process
- 利用VHDL硬件描述语言来实现正余弦信号的产生-Using the VHDL hardware descr iption language to achieve the generation of a positive cosine signal
uartlcd
- 通过FPGA的VHDL程序实现对1602液晶的控制，此模块可以作为IP核直接调用-By FPGA VHDL program to achieve the 1602 LCD control module can be called directly as an IP core
mips
- 支持add、addi、sub i、beq、or、ori、lui、j-support add、addi、sub、subi、beq、or、ori、lui、j
traffic
- 交通灯程序，用quartus ii编程实现，里面有详细代码，有兴趣的可以加以深究。-Traffic lights, with quartus ii programming, there are detailed code, are interested can be the bottom.