资源列表
dd
- Digital Delay using Verilog (The program is wrrong I ll upload the right one soon)
dsp
- DSP Architechture using Verilog. (the concept of the programm differ the original)-DSP Architechture using Verilog. (the concept of the programm differ the original)
agc_gen
- AGC(自动增益放大) Verilog代码 设计可以参考-AGC (automatic gain control) can refer to the Verilog code design
agc_gen2
- AGC(自动增益放大) Verilog代码 设计可以参考 第二部分-AGC (automatic gain control) can refer to the Verilog code design
Affichage_VGA
- Display image via VGA port in FPGA bord
FPGA-Implementation
- Interleaving with error correction
entrelacement-vhdl
- VHDL Implementation Interleaver
verilog
- vivado的led灯的学习程序，有兴趣学习soc的可以下载-the program for vivado study on SOC
FPGA--uart
- FPGA串口通信源码,通过Verilog来实现功能，新手可以参考下-FPGA uart
FPGA--example
- 一些有价值的FPGA例子，大家可以参考一下。VHDL-fpga example
LPC post
- 使用VHDL语言通过LPC接口实现的post卡功能，用于debug
counterdiv
- 用D触发器组成2分频电路，并对时钟进行计数-2-div frequency using D flip-flop circuit.