资源列表
bch_codeword11
- 3072 to 3240 vhdl encoder source code
verilog-radix4
- Master Thesis(FFT_RADIX-4)-This thesis deals with a 64-point Radix-4 in-place FFT, based on an improved FFT algorithm. The whole FFT structure was implemented based on self-designed modules and by manipulating the embedded Virtex II FPGA’s module
RADIX4-_VHD_FILES
- ALL .VHD FILES USED IN IMPLEMENTING THE RADIX-4 FAST FOURIER TRANSFORM ON XILINX DESIGN TOOL
trial_i2c
- i2c code for vhdl implementation,i2c main code with u-art_tx.vhd file and i2c_master.vhd
Dm9000a_Verilog
- 本文为实现高速数据的实时远程传输处理,提出了采用FPGA直接控制DM9000A进行以太网数据收发的设计思路，实现了一种低成本、低功耗和高速率的网络传输功能，最高传输速率可达100Mbps。-DM9000 driver
ccd_drive
- FPGA驱动TCD2252D源码，包含六路驱动时序，经验证无误-FPGA drives TCD2252D source, including six road driving timing, proven correct
digital-clock
- 用FPGA实现数字钟功能，用VHDL语言编写，含有课程设计报告-FPGA digital clock
i2c_eeprom
- 采用I2C总线读写EEPROM，较好地展示了I2C协议，是练习I2C协议的好实例-Using I2C bus to read and write EEPROM, to better show the I2C protocol, is to practice good examples of the I2C protocol
parallel_to_serial_conversion
- 熟悉FPGA串并转换思想，并行数据转换为串行数据输出，通过modelsim验证-Familiar FPGA string and convert ideas, parallel data into serial data output via modelsim verification
passlock
- 采用verilog编写的4位密码锁，输入4位密码，带有返回重新输入功能，经过确定验证后，如果密码正确，则发出灯亮，如果错误则蜂鸣器报警。通过实验-Using verilog written four locks, enter the 4-digit password, after determining verify if the password is correct, then the issue lights, the buzzer alarm if an error. Experimen
serial_number_check
- 序列检测，学习verilog三段式状态机的经典例程，modelsim仿真无误-Sequence Detection, three-state machine learning verilog classic routines, modelsim simulation is correct
fp_prj
- 分频器，Verilog语音编写，quartus仿真过，可以利用使蜂鸣器发生-Frequency divider, Verilog speech writing, quartus simulation, can make use of the buzzer