资源列表
IIR(vhdl)
- 基于fpga的数字滤波器设计的vhdl源代码-Fpga digital filter design based on the vhdl source code
LED
- 基于单片机显示原理的LED显示原理级应用-Based on the principle of single-chip LED display shows the principle applications
Barrel-shifter
- barriel shifter is used to design the unconfined shift. It has optional code to decide the logical function.also, you can decide the bit your shifter.
digital_lock
- Verilog code for digital combinational lock //BCAC – Unlock sequence //wrong sequence –alaram goes on and goes off only after pressin another 4 wrong buttons. //once the lock is open ,we can close the lock by pressin any key //From any state
curriculum_design_v2
- 课程设计，数字频率计源代码，用Verilog HDL写的-Curriculum design, digital frequency meter source code, written using Verilog HDL
Fir_20
- 根据kaiser窗函数实现了Fir滤波器的设计，用于图像处理方面-Achieved under the kaiser window function Fir filter design for image processing ...
wavelet
- 基于DB8小波变换的verilog代码设计，支持Avalon总线-Verilog DB8 Wavelet Transform Based on code design, support Avalon bus
SIN_COS
- fpga产生正弦波形，sin_cos，modelsim仿真通过-fpga generate sin waveform,test passed
mmcfpgaconfig.tar
- 基于FPGA的MMC卡实现，内部包含了C++仿真调试代码以及FPGA的实现代码，建立工程后可以之间编译调试
delay
- 1. Blocking_LHS_Delay：阻塞赋值左式延时。 2. Blocking_RHS_Delay：阻塞赋值右式延时。 3. NonBlocking_LHS_Delay：非阻塞赋值左式延时。 4. NonBlocking_RHS_Delay：非阻塞赋值右式延时。 -1. Blocking_LHS_Delay: blocking assignment left-style delay. 2. Blocking_RHS_Delay: blocking assignment t
leds
- LED Blinking Program Code
rtl
- This is also RTL of router by using another type of method