资源列表
PWM1
- 一种简单的PWM VHDL实现方法，脉宽可调，周期可调，可作二维流水灯控制练习使用-A simple PWM VHDL, pulse width adjustable cycle adjustable, can be used for two-dimensional water light control practice using
asdasd
- a pibg file that is a seven segment
fanggeyidong
- 用硬件描述语言VerilogHDL完成基于FPGA、VGA的方格移动设计。-Using hardware descr iption language VerilogHDL to complete the FPGA, VGA based on the design of the grid.
LED-DISPLAY
- 在DE2板上 （nios II）实现LED的年月日，时分秒的显示。-Achieving LED s year, month, day, hour, minute, seconds display in the DE2 board (nios II).
seven_seg_ctrl
- Seven Segment Control
juzhenjianpan
- 4*4矩阵键盘，并在8位数码管上显示按键值-4* 4 matrix keyboard, and 8-bit digital value displayed on the button
part2
- part 2 for verilog basic
sequence_detect
- 串行数据检测器，检测数据中是否存在10010，用FSM编写，在modelsim中仿真通过，功能上符合要求-Serial data detector detects data exists 10010, with FSM write, through simulation in modelsim functionality required
Serial-input--parallel-output
- 关于VHDL的一个问题。串行输入64位二进制数，要求把数据按每8位存在8个寄存器中并行输出-A question about the VHDL. Serial input 64-bit binary number is required for every eight data registers the presence of eight parallel outputs
countertest
- vhdl实现的计数器
MxIterative
- 该问题是线性移位寄存器的综合问题提出的，给定一个N长的 二元序列，如何求出产生这一序列的级数最小的线性移位寄存 器，即最短的线性移位寄存器 -The problem is that the linear shift register integrated question, given a N-long binary sequences, how to derive the sequence of series have the smallest linear shift regis
dac8143
- Digital to Analog Converter Model for Analog Devices part DAC 8143.