资源列表
d_flip_175
- 4 D-FlipFlop source code with VHDL
int_div
- 这是流水灯的分频程序，可能不是很完善，欢迎大家下载。-This is the light frequency water program, may not be perfect, welcome to download.
tdc
- time to digital convertor
VHDL-example_counter
- M=11的计数器；计数是一种最简单基本的运算，计数器就是实现这种运算的逻辑电路，计数器在数字系统中主要是对脉冲的个数进行计数，以实现测量、计数和控制的功能，同时兼有分频功能-M = 11 counter The count is one of the most simple basic computing, counter to realize the operation is logic circuit
4addr
- 用verilog 语言编写的4位全加器，还是入门基础必备.-Verilog language with 4bit full adder, or basic essential.also it s so important to learn verilog!
ov7670_controller
- ov7670的控制器代码，VHDL，稍加修改即可完成ov系列的摄像头的控制-control ov7670 controller code, VHDL, slightly modified to complete ov series cameras
BC-ADDRESS
- B61580 1553B BC模式配置地址-B61580 1553B BC
ledbuff
- fpga单片机通过数码管实现1S自加功能，时间通过计数器实现-The fpga single chip machine implements the 1S self-addition function through the digital tube, and the time is achieved through the counter
multiplier_6x6_version2
- multiplier_6x6___verilog hdl
koggestone_32
- koggee stone 32 bit adder
clock
- 运用vhdl编写时钟，显示时间，具有基本的功能 -VHDL write clock, display time, basic functions
HEX8
- 描述了七段数码管电路,实现正常的译码功能，并例化为集成8块的数码管模块-Descr iption of seven-segment digital tube circuit, the normal decoding function, and patients into integrated 8 digital control module