资源列表
CPU-to-VHDL
- CPU realization using VHDL CPU realization using VHDL-CPU realization using VHDLCPU realization using VHDLCPU realization using VHDL
lab5
- de2 altera 实验6 Adders, Subtractors, and Multipliers 答案-de2 altera experiment 5 Adders, Subtractors, and Multipliers answer
cuce(ok)
- 在起始信号与停止信号之间计数，而且通过仿真验证成功-Between the start signal and stop signal counts, and success is validated by computer simulation
s3ask_ddr2
- DDR2-400样例源代码，用于Xilinx Spartan 3A/3AN Starter Kit-DDR2-400 sample source code for Xilinx Spartan 3A/3AN Starter Kit
color_space_converters
- 色彩空间转换硬件实现，用于图像处理，编码，解码部分-Color space conversion hardware for image processing, encoding, decoding part of the
EasyFPGA060_Routine_RAM
- EasyFPGA060 RAM实验例程与文档-EasyFPGA060 RAM test routines and documentation
Xilinx
- 非常详细的介绍了ISE软件的使用，以及如何生成可烧录文件，如何将烧录文件下载到Xilinx开发板，非常傻瓜式的操作。-Very detailed descr iption of the ISE software to use, and how to generate a recordable document, how to burn files downloaded to the Xilinx development board, a very fool-operation.
pc_cal
- VHDL code calculation system
NIOSIIEverthing
- ALtera公司的NIOSII的入门资料，对于初学者很有指导意义，欢迎下载。-ALtera entry NIOSII company information very instructive for beginners, are welcome to download.
FXY4568_LM75A
- 温度检测 LM75A I2C串口通信协议 -Temperature detection
msp430f5529_usb_pc
- 一个单片机与PC通过串口通讯的实验，单片机型号是msp430f5529-A single chip computer and PC through the serial port communication experiment, single-chip model is msp430f5529
chuankoutiaoshi
- 串口RS232的通信时序和逻辑设计，实现数据FGPA与PC之间数据的相互传输-RS232 serial port communications timing and logic design, the mutual transfer of data between FGPA and PC data