资源列表
T_0D
- 带同步清0、同步置1的D触发器模块。希望能够帮到大家。(D trigger module with synchronous clear 0 and synchronous setting 1. I hope I can help you.)
standard_neek_80
- the cycloneIII standard of altera
xapp354
- Xilinx的CPU-NAND Flash接口转换代码。-CPU-NAND Flash interface code from Xilinx.
S6_VGA
- verilog HDL编写的FPGA的VGA接口显示程序，显示所有八种色彩。-FPGA VGA interface written in verilog HDL program, showing all eight colors.
singlePcyclePMIPS2
- 多周期MIPS实现的CPU设计方案，包括源码-MIPS multi-cycle
I2C_cyclone 1
- I2C interface on cyclone 1 epc1
fpga_dk_ps2_vga
- ps2 vga interface in vhdl code
KEY2_TEST
- Altera firmware examples for Cyclone IV
NIOS设计从入门到精通
- nios大神进阶，一本非常好的FPGA书籍，从RTL到eclips(nios tech.a very good book learning FPGA tech.)
linaro_demo
- 基于ZNYQ开发板的测试demo，包含linaro操作系统。-Based on zynq-7000 board，the demo project with linaro-linux os。
mppt_mod
- maximum power point tracking system (MPPT) VHDL code with testbench
calc_v2_s3eboard
- Simple calculator EDK design implemented on Digilent S3EBOARD using Microblaze soft-core CPU. Input: PS/2 keyboard, output: VGA monitor.