资源列表
fpga-jianpan-ip-core
- 基于fpga的键盘设计ip核的vhdl源代码-Ip fpga design of the keyboard based on the vhdl source code for nuclear
FPGA-KZCJ
- NIOS2 FPGA控制TLC5540进行数据采集-FPGA TLC5540 control NIOS2 for data collection
src
- n位二进制绝对值减法器，基于FPGA的硬件语言-n-bit binary absolute value subtraction, FPGA-based hardware language
bujindianji
- VHDL通过设计有限状态机实现步进电机控制源码程序-VHDL implementation through the design of finite state machine source code stepper motor control program
fifo_verilog
- 用verilog 实现 fifo，宽度按自己需求扩展-Achieved with the verilog fifo, the width of expansion according to their needs
mult
- 这是一个mult源文件，用verilog语言写的，经过仿真正确。-This is a mult programm.
T18PM8021
- T18PM8021 176x220 LCD initialization source code
booth
- BOOTH算法VHDL语言代码 基于FPGA quartus-BOOTH VHDL!
code
- FPGA 学习 .再学习 .谢谢!啥得啊,还不够呢!
pppppppppppp
- pong game implementation on spartan 3e fpga kit
Structural-Pipeline-Multiplier
- Structural Pipeline Multiplier
CORDIC
- 用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。-The cordic arithmetic implemented by verilog is adapted to exceed function.It is usually used to implement sine multiplication or coordinate tuansform.