资源列表
sm
- 基于xc4vsx25芯片而开发的verilog语言程序，实现按键输入数字密码并显示于数码管上的功能。程序均已通过调试试验，可于SEED-XDTK_V4实验箱上实现。-Verilog language program developed based xc4vsx25 chip key input digital password displayed on the digital tube on the function. Procedures are debugging test in SEED-
UART
- AVR单片机串口程序 很好用的串口程序，可以发送16进制和ASC-AVR RS232
tlc
- traffic light controller in verilog
FIFO_Resuorce
- 实现同步FIFO功能,很好很不错的，希望大家支持-implemetation FIFI function
111
- 基于fpga和sopc的vhdl源程序实现vga的显示-fpga vhdl vga display
ln-function
- 利用VHDL编写ln(1+x)这样的特殊函数逼近程序，采用Quartus 仿真-Writing the ln (1+x) special function approximation procedures using VHDL simulation with Quartus
rms_cal
- 基于VHDL的有效值求取，内含低通滤波子模块-RAM CAL with LPF by VDHL
dig_filter
- 数字滤波器设计，使用matlab设计一款带通滤波器-digital design
songer
- 著名歌曲《十送红军》音乐发生器在FPGA上实现-The famous song " Shisonghongjun" music generator in the FPGA
eda
- 基于VHDL实现的停车场停车位显示系统的设计，使用可编程逻辑芯片FPGA构成的停车位显示系统。-The design of car parking spaces display system based on FPGA is a very practical Subject, and close to our lives. This subject is the design of a times 8 parking spaces display based on the FPGA in VH
fifo
- CAN总线，DSP+FPGA+SJA1000架构，FPGA负责逻辑设计,此文件内有FPGA负责dsp和sja1000通信-CAN bus, DSP+ FPGA+ SJA1000 architecture, FPGA logic is responsible for the design, FPGA is responsible in this document have dsp and sja1000 Communications
Test9454
- S3F9454控制芯片仿真器测试程序，可验证仿真的可行性-S3F9454 control chip emulator test program that verifies the feasibility of the simulation