资源列表
Low-phase-noise
- 能够完成低相噪、低杂波数字锁相环路滤波器-Low phase noise, low clutter digital phase-locked loop filter design
SDtoolbox
- delta-sigma 设计工具箱,可以进行调制器设计,数字滤波器设计等-design-box of delta-sigma ADC
zz
- 用verilog实现的PS2和VGA程序,仿真通过-PS2 and VGA verilog implementation of the program, through simulation
verilog_tutorial
- Chapter 1 Introduction Chapter 2 History of Verilog Chapter 3 Design and Tool Flow Chapter 4 My First Program in Verilog Chapter 5 Verilog HDL Syntax and Semantics Chapter 6 Gate Level Modeling Chapter 7 User Defined Primitives Chapter
VGA_SW_Verilog
- VGA IP硬核设计,通过开关简单控制输出图像,在ISE14.6验证通过。-VGA IP hard-core design, the output image by a simple control switch, ISE14.6 validation.
chuankou
- 基于fpga和stc15L408ad单片机的串口通信程序,一次可发送16位-Stc15L408ad based fpga and microcontroller serial communication procedures, one can send 16
E4_7_IIRCas
- 完成iir滤波器的相关设计,同时利用数据测试该模块的正确性,对其进行仿真,观察其波形。(Complete the design of IIR filter, and use the data to test the correctness of the module, to simulate it and observe its waveform.)
eternityclock
- 一个在Xilinx spartan3实现的时钟,具有时分秒的计时显示以及年月日的显示,很有参考价值
Quartus_II_11.0
- QuartusII.11.0学习与应用,QuartusII.11.0的入门学习与快速应用方法-QuartusII 11.0 learning and application, QuartusII 11.0 introduction to the study and application methods quickly
QUASIC
- THIS IS USED FOR IN VLSI PROJECTS
FPGA_Advantage
- FPGA Advantage简易教程,很好的入门指导!-FPGA Advantage Tutorial summary, a good introductory guide!
Camera_FPGA_Interface
- CMOS Camera interface with FPGA
