资源列表
VHDL-Finished-Homework
- 有闹钟功能，可以定时的电子时钟，还可以设定定时时间-Have alarm clock function, the electronic clock timer, you can also set the regular time
Lift
- VHDL编写的6层电梯控制器，可在Altera的CPLD系统运行实验，内附实验报告-VHDL prepared 6-storey elevator controller in Altera s CPLD system experiment, experimental report containing
dianzhen
- 基于FPGA的点阵模块，输入汉字信息后可以逐行扫描-After the dot-based FPGA module, input Chinese information can be progressive scan
A_CPU_verilog
- 这是一个verilog编写的CPU程序，希望对初学者有所帮组吧-a cpu
lcd12864
- lcd12864液晶显示 Verilog语言-lcd12864 VerilogHDL
vcs
- VCS的使用教程，中文版的。对于初学者入门有较大帮助。-VCS use of tutorials, the Chinese version. Introduction of great help for beginners.
VGA_Test.rar
- 基于FPGA的VGA驱动代码VHDL 在显示屏显示一个汉字,FPGA-based VHDL code of the VGA driver that a character in the display
02.7Seg_Nexys3
- 内容是基于FPGA的VHDL和verilog程序的编写，有助于初学者的学习-The content is based on the FPGA VHDL and Verilog program written to help beginners learning
jibenmendianlu
- 熟悉使用 ISE 软件进行简单的VHDL 文本方式设计，学习使用USB 电缆或并口下载线 下载逻辑电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-Familiar with ISE software to design a simple VHDL text, learning to use a USB cable or parallel port download cable Download logic to the FPGA, and can debug t
Usb
- 基于FPGA的驱动设计，使得用户的USB驱动在此完美实现。-FPGA-based drive design makes the user' s USB drive in this work perfectly.
DS1302
- 基于DS1302芯片的VERILOG 语言数字钟。可实现年月日时分秒显示。-DS1302 chip-based language VERILOG digital clock. Date can be achieved when every minute display.
Verilog_Tutorial
- it is very good tutorial, it is about vverilog