资源列表
ES8388-DS
- 低功耗立体声音频编解码器 带耳机放大器 ES8388是一种高性能，低功耗和低成本的音频编解码器。它由2通道ADC，2通道DAC，麦克风放大器，耳机放大器，数字声音效果，并模拟混合和增益功能。-Low Power Stereo Audio CODEC With Headphone Amplifier ES8388 is a high performance, low power and low cost audio CODEC. It consists of 2-ch ADC,
dianti
- 实现电梯的相关控制系统，在开发板EGO1上实现，数码管显示相关的楼层和状态-dianti in verilog
PIN
- 用VERILIG编写的FPGA串口与电脑通信-Written by VERILIG FPGA serial communication with the computer
signal_generator
- signal Generator: it can generate square, sine, saw-tooth, triangular wave forms on spartan 3an board
core_arm
- arm核的源代码，非常不错，欢迎下载 arm核的源代码，非常不错，欢迎下载-arm core source code, very good
test1602
- 1602的VHDL程序！在自己的板子上一测试测试成功！-1602 VHDL program! In their board a test success!
muhammadali_357
- T-flip flop lab done in our campus
software
- ddr3 Test program for Altera FPGA Starter Kit
TimeQuest
- Timequest的应用试验，包含Timequest的例子。-Timequest application testing, including Timequest example.
VHDL_processor
- 利用VHDL语言描述的一个简单微处理器,可以通过修改源码来调整指令集,可以在Quartus II上直接运行和编译.-use VHDL descr iption of a simple microprocessor, can modify the source codes to adjust instruction set, Quartus II can be directly compiled and running.
seg70_ise7_bak
- 7SEGMENT VHDL CODE-THIS CODE VERY GOD FOR DRIVE 7SEG-IN ISE FUNDATION 11.1
fir_16
- fir滤波器-verilog，基于verilog的fir滤波器源码-fir filter-verilog, the fir filter based on the Verilog source code