资源列表
fifo
- fpga中fifo的基本原理介绍了fifo的基本原理以及对fifo实现方法的阐述。-The basic principle in fpga fifo fifo introduced the basic principles and methods of implementation described fifo.
Verilog-Tutorial-v1
- verilog manual spanish for students. No vale pa na.
098111__1367421625730
- DE2_System_v1.4a.zip 71.2M 2007- 02 22:51 For DE2 boards with Serial Number (S/N) starting with Digit 0 and QuartusII version 6.0 DE2_System_v1.4b.zip 79.4M 2007-07-11 22:42 For DE2 boards with Serial Number (S/N) starting with Digit 0
VHDL_TipsTricks
- Pong game development and implementation in VHDL
dac
- DAC converter design with Verilog code and testbench
vhld_tb_latest.tar
- vhdl testbentch 编写模板。非常实用-vhdl testbentch prepared templates. Useful
实验13 TFT LCD显示实验
- 基于stm32的lcd显示实验，可以更好的显示数据(STM32 based LCD display experiment, you can better display data)
4_coded_lock
- 本代码实现电子密码锁功能，用的是VHDL语言。可以方便和 可靠实现加密解密的过程。-The code to achieve the electronic password lock function, using the VHDL language. The process can be convenient and reliable implementation of encryption and decryption.
CPLDFPGAprog
- vdhl programming notes for cpld and fpga
VHDL_TipsTricks
- tips to design fir filter step by step
i2s_interface
- - I2S top level test bench. Two transmitters and two receivers are instantiated, one each in slave and master mode. Test result is displayed in the log window, there should be no errors.-- I2S top level test bench. Two transmitters and two receivers
Digital_030423
- 服务器的的板在载控制器的AHDL程序,包括原理图编译,用在EPM7128上(CPLD).-server board controller is contained in the AHDL procedures, including schematic compiler, the use EPM7128 (CPLD).