资源列表
SDRAM_ctrl
- 基于DE2的SRAM驱动，带测试程序。用VHDL语言编写。-sdram drive
FPGAbasedontheworkofthe1024-pointpipelinedFFT
- 基于FPGA的1024点流水线工作方式的FFT实现,适合fpga的技术人员做信号处理参考-FPGA based on the work of the 1024-point pipelined FFT approach the realization of the technical staff for doing fpga signal processing reference
PWM-design-Based-on-FPGA
- 本设计是基于FPGA控制的PWM信号输出系统，以EP3C5E144C8芯片为核心，通过参考信号和输入信号在计数器中的比较来实现占空比、频率可调的脉冲宽度调制信号-The design is FPGA-based control of the PWM signal output system, to EP3C5E144C8 chip as the core, to achieve adjustable duty cycle, frequency, pulse width modulation si
bus
- 公交车系统基于FPGA芯片的基础上，增加了数码管显示模块、语音自动报站模块、红外通信模块。站牌系统采用以FPGA为核心的主控芯片，增加液晶显示模块、红外通信模块、RS232总线模块、指示灯显示模块等。(The bus system is based on FPGA chip. It adds digital tube display module, voice automatic reporting module and infrared communication module. The bu
Example-codes
- example code of vhdl
key_piano
- 按键消抖，Verilog编写，可用用，在quartus仿真过，也下载到FPGA开发板啦，可用。-Verilog code, available to use, in the quartus simulation, also downloaded to the FPGA development board, is available.
PULSE_DIR_QEP_INDEX_EP3C_1_SRV_ON
- 利用fpga EP3C16F484C8N发出脉冲，方向，使能信号，从而控制电机驱动器-EP3C16F484C8N send signals of PULSE_DIR_QEP and SRV_ON to control the driver of motor
counter
- 利用verilog开发的计数器程序，比较基本，包含完整的工程-Use of the the verilog development of counter program, more basic, including complete engineering
7.2FIRTest
- 很好用的FIR数字滤波器8阶，经过测试都可以使用，里面可以修改系数变成自己的-Useful FIR digital filter of 8 order, after the test, can be used inside can be modified coefficient into their own
VHDL
- VHDL数字控制系统的设计范例，用例子教会你VHDL-VHDL design of digital control system example, you use examples of the Church VHDL
FPGA_LECTURE(PDF)9
- 北京理工大学FPGA讲义,pdf格式，初学者必备-Beijing Institute of Technology—-fpga-lecture
FPGAnote
- 北理FPGA讲义，主要是FPDA的入门，包括VHDL，FPGA结构，开发软件的运用。-North rationale FPGA handouts, mainly FPDA entry, including VHDL, FPGA structure, development of software applications.