资源列表
Verilog-HDL
- 这是关于VERILOG HDL的有限状态机的源码，大家参考参考，应该有好处的。-This is about VERILOG HDL source code for finite state machines, we refer to the reference, it should be good.
FPAG_REAL_SOURCE
- FPGA实战项目程序，适合进阶和务实的学者。值得拥有！-FPGA for advanced learner
monitoringV5
- 文件的FPGA是基于Xilinx ISE写的，所用开发板为zedboard7020 484系列，完成的功能为：读取XADC里的温度，VCC，并存储到RAM中，通过流水灯实现翻看，读取等功能.-Document is based on Xilinx ISE FPGA wrote, the use of development board for zedboard7020 484 series, completed functions: reading XADC in temperature, VC
1_LAB
- Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge.
FaultToleranceTechniquesforSRAMBasedFPGAs
- 基于FPGA的SDRAM设计，相信大家都会感兴趣！原版的外文书
ljq
- 用力控实现累加器，非常有用的，大家下载吧-Force control to achieve accumulator, very useful, we download it
PX9125POWERELECTRONICSANDDRIVESMANUALSFPGA
- power electronics driver using VHDl-power electronics driver using VHDl.........
systemverilog
- system verilog 是国际流行的设计和验证语言，根据语言的特点分为两部分:for设计和for验证。另外一种书是介绍如何应用system verilog, 如果你要用syntem verilog, 推荐先读一下。-system verilog is popular hardware design and verification language. The languange compose of two part: systemverilog for desin , system ve
fundamentals-of-digital-logic-with-verilog-design
- fundamentals of digital logic with verilog design
filters_FPGA.pdf.tar
- Implementation of filter in VHDL
11
- Verilog HDL程序设计与实践，从入门到提高，必备的资料-Verilog HDL program design and practice, from entry to the improvement of the information necessary
SPWM_TEST
- 这是一个有关SPWM的程序，本人已经调试好。欢迎使用-This is a program for SPWM, I have good debugging. Welcome to