资源列表
ML505
- ML505开发平台测试的工程(采用嵌入式系统实现)，整个工程。-ML505 development platform for test engineering (embedded systems implementation), the whole works.
数字系统课程设计
- Metro tickets system. Simulating the tickets sales system of metros.(Codes in doc. Simulating the tickets sales system of metros. With ISE, in VHDL.)
DE2_115_ControlPanel_V2.2.0
- This file may be support learn VHDL code
cc2420interfacecs
- 对cc2420无线模块的接口。接受到的数据都使用双口ROM的方式与后台核心控制部分传送。-On the CC2420 radio module interface. Receive data using dual-port ROM with the core control part of the background transmission.
xilinxusb
- Xilinx usb下载电缆的图纸资料，可直接制版，然后下载Xilinx的ISE软件进行固件升级。制作图纸准确，使用与官方的下载电缆完全一致。-Xilinx usb download cable drawings, direct plate, and then download the Xilinx ISE software for firmware upgrades. Produce accurate drawings, using the official download cable ex
fpgaNDA
- 内容是基于FPGA的DDR2 的读写操作-FPGA-based DDR2 content is read and write operations
anjian
- 自己试着写的通过两个按键进行选择的小程序，在一定时间里通过按键次数进行选择，希望大家支持-Try to write the two buttons to select a small program to choose, in a certain period of time by the number of keystrokes, I hope you will support
High-speedhighperformanceFFT
- 高速高性能FFT处理器的VLSI实现研究，适合做FPGA的技术人员参考研究FFT-High-speed high-performance FFT processor VLSI realization of research, suitable for FPGA technology reference study FFT
CRC_Generator
- This a binary encoded on the check, by check, to verify whether the correct transmission-This is a binary encoded on the check, by check, to verify whether the correct transmission
FIR_16bits_16length
- 这是一个实现了16位16个长度的FIR滤波器，已经通过仿真。可用-This is a realization of the 16 16 the length of the FIR filter, has been through simulation. Available
PWM_IP_test
- zynq-7000开发板 PWM IP核（VHDL和Verilog）-zynq-7000 PWM IP
SV-Tasks-a-Functions-Intro
- system Verilog tasks & functions introduction