资源列表
spi_test
- 基于FPGA的SPI通讯测试，可以一块FPGA单独测试，也可以2片FPGA对测。-SPI communication test, based on the FPGA can be a piece of FPGA test alone, can also be 2 piece of FPGA for measurement.
Handbook_elliptic_curve_cryptography
- A wnice to guide to stat Elliptic Curve Cryptography
adder
- 能够实现单精度浮点加法运算。输入引脚有：第一运算数，第二运算数，复位信号，时钟信号。输出信号有：运算结果，运算完成标志。(To achieve a single precision floating-point addition operations)
sdram_hr_hw
- 在FPGA硬件上实现计算机通过串口发数据给FPGA，数据保存到SDRAM中，然后又返回给计算机串口。-In FPGA hardware realize computer data through the serial port issued to FPGA, the data saved to SDRAM, and then again back to the computer serial port.
vhd_xilinx_manuall
- vhdl xilinx manual for beginners
sdram_seg
- 基于NIOS 的SDram 核-Based on the NIOS the SDram nuclear. . . . . .
ddc
- 信号处理前端 数字下变频 多相结构滤波 包含fir滤波器设计 非核- polyphase filter fir filter design DDC
SignalTap-shiyong
- fpga读写sram（61LV25616），程序附详细注释，包含波形仿真文件及signaltap在线调试文件，并附有文档对程序及signaltap的使用进行了详细说明。 -fpga read and write sram (61LV25616), with detailed program notes, including documents and signaltap waveform simulation debug files online, along with documentatio
uartverilog
- VERILOG HDL下写的串口驱动程序，经验证可以正常实现串口功能-VERILOG HDL to write serial driver, proven functionality can normally achieve serial
uart_io_test
- verilog实现的uart，在icore2上能测试，代码是特权同学的，我修改了波特率部分。复位部分-verilog achieve uart, on icore2 can test the code is the prerogative of the students, I modified the baud section. Reset section
spi_master
- spi通信主从模式 可以设置速率/工作模式(Master slave mode of SPI communication)
Fast_SQRT
- 只使用简单的移位操作对32bit整型数进行开方的算法的Verilog实现-realize the sqrt algorithm which only use shift operation on 32bit int by Verilog